The present invention relates to a semiconductor device and is suited for use, for example, in a semiconductor device having therein a germanium photoreceiver (photodetector).
Japanese Patent No. 3239596 (Patent Document 1) describes a GaAs/Si composite integrated circuit having a contact hole in an Si3N4 layer serving as a protector of a GaAs operation layer, an Au—Ge alloy layer which is an ohmic electrode material for GaAs at the bottom portion, and an Au layer on this alloy layer and having, as a barrier layer, a conductor material such as Mo, which is inert to Au or Al at about 450° C., inserted between the Al wiring and the Au layer.
[Patent Document 1] Japanese Patent No. 3239596